1. Field of the Invention
The present invention relates to a semiconductor device, and a semiconductor package and a circuit device using the same.
2. Description of the Related Art
In recent years, in order to realize downsizing and high density packaging of a semiconductor device, a stacked multichip package in which a plurality of semiconductor elements are stacked and sealed in a single package is practically used. In such a stacked multichip package, the plurality of semiconductor elements is stacked sequentially on a wiring substrate or a lead frame. The plurality of semiconductor elements are connected to connection terminals of the wiring substrate or the lead frame via bonding wires, respectively. Therefore, the plurality of semiconductor elements are stacked in the same vertical direction.
In a conventional stacked multichip package, a bonding wire connected to an uppermost semiconductor element inevitably passes through a portion over the thickness of stacked multiple semiconductor elements. Accordingly, a sealing resin is required to have an additional thickness to the extent of the shape of the bonding wire. The conventional stacked multichip package has a package base such as the wiring substrate, the lead frame, or the like as an indispensable component. The thickness of this package base is also a factor to increase the thickness of the stacked multichip package (semiconductor package) as well.
Further, in the conventional stacked multichip package, reliability assessment test such as Burn-In test is made after manufacturing the package (after sealing with resin). Therefore, even when a single semiconductor element composing the multichip package has an initial failure or a process failure, the entire package results in failure. The yield of the semiconductor package downs exponentially with the stacked number to the base being each yield of the semiconductor elements.
In JP-A 2001-036000 (KOKAI), there is described a semiconductor package in which two semiconductor elements are arranged such that their surfaces on which a bonding pad is formed respectively face each other. However, there, insulating layers are formed on such surfaces of the respective semiconductor elements as to form the bonding pads and further metal wirings are formed on the surfaces of the respective insulating layers, in which these metal wirings are connected via solder balls. Therefore, it is impossible to reduce the thickness of the semiconductor package itself sufficiently. In addition, the connection between a mounting board and the semiconductor package is established by arranging a bonding wire in a space between the two semiconductor elements. Also from this viewpoint, the thickness of the semiconductor device tends to increase.